JPH036578U - - Google Patents
Info
- Publication number
- JPH036578U JPH036578U JP6755389U JP6755389U JPH036578U JP H036578 U JPH036578 U JP H036578U JP 6755389 U JP6755389 U JP 6755389U JP 6755389 U JP6755389 U JP 6755389U JP H036578 U JPH036578 U JP H036578U
- Authority
- JP
- Japan
- Prior art keywords
- output
- latch
- delay line
- receives
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Tests Of Electronic Circuits (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6755389U JPH0729506Y2 (ja) | 1989-06-09 | 1989-06-09 | シフト方式のパターン発生部をもつicテスタ |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6755389U JPH0729506Y2 (ja) | 1989-06-09 | 1989-06-09 | シフト方式のパターン発生部をもつicテスタ |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH036578U true JPH036578U (en]) | 1991-01-22 |
JPH0729506Y2 JPH0729506Y2 (ja) | 1995-07-05 |
Family
ID=31601223
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6755389U Expired - Lifetime JPH0729506Y2 (ja) | 1989-06-09 | 1989-06-09 | シフト方式のパターン発生部をもつicテスタ |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0729506Y2 (en]) |
-
1989
- 1989-06-09 JP JP6755389U patent/JPH0729506Y2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0729506Y2 (ja) | 1995-07-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |